Description: Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) ... Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years ... Build UVM/System Verilog-based verification environments for IP/subsystem/SoC ...
2 days ago
Description: Senior Firmware Engineer Location: Sunnyvale, Full Time On- ... seeking a highly skilled Firmware Software Engineer to join our team. As ... a Firmware Software Engineer, you will apply the principles ...
3 days ago
... for a highly skilled Physical Design Engineer to work at block level ... , timing closure, and sign-off verification. The role requires expertise in ...
3 days ago
Description: Role: RTL Integration Engineer Location: Sunnyvale CA (On-Site) ... -on experience with digital design verification and subsystem integration. Experience with ...
a day ago