Description: Title: RTL Engineer Location: Santa Clara, CA (Day-1 onsite) Duration: 6 Months Role: Integrate RISC-V Core to SoC Key Responsibilities Integrate RISC-V CPU cores into SoC designs, collaborating with cross-functional teams (DV, physical ...
15 days ago
Description: Key Responsibilities: Manages the SAP GTS migration project including but not limited to the following activities: Defines the project charter, develops governance structure, prepares detailed project plan, monitors the program/project from ...
28 days ago