... are seeking a driven and versatile engineer to help drive safety and ... test plans that enable rapid design iteration and robust product validation ...
3 days ago
Description: Strong expertise along-with complex SoC/IP debug is must At-least 5+ years of experience in System Verilog HVL and C/C++. AMBA AXI bus along-with ARM or C based processor Experience in complete verification cycle which includes development of ...
4 days ago