Description: Skill Need: PCIe Gen 4/5/6, CXL, RISC-V, ARM, Oscilloscope, Multimeter, Logic & Power Analyzer, BERTS C/C++, Python, Perl, Windows, Linux Job Description Take lead responsibility for validating PCIe and its subsystems on multiple SoC ...
4 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Duration: ... provisioning, Fuse programmingOwn design and validation of System Level Test from ...
6 days ago
Description: Position: System Level Test Engineer Location: San Diego, USA Duration: ... , Fuse programming Own design and validation of System Level Test from ...
6 days ago