Description: Position Title: Design Verification Engineer Location: Mountain View, CA - Onsite ... Build UVM/System Verilog-based verification environments for IP/subsystem/SoC ...
18 days ago
Description: Systems Hardware Architect / Design Verification Engineer Mountain View, CA NO 14+ ... requirementsBuild UVM/System Verilog-based verification environments for IP/subsystem/SoC ...
20 days ago
... skilled Embedded Test Engineers to join our Design Verification Testing (DVT) team ... -on experience in embedded software verification and a solid understanding of C/C++ programming ...
9 hours ago