Description: Job Title: Design Verification Engineer (DV) Company: Sivaltech Location: Santa ... 're seeking an experienced Design Verification Engineer to join our team in ... , CA. Job Description: As a Design Verification Engineer, you'll develop and execute ...
28 days ago
Description: Job Title: Senior Design Verification Engineer Company: Sivaltech Location: San Diego ... seeking an experienced Senior Design Verification Engineer to join our team ... Description: As a Senior Design Verification Engineer, you'll develop and execute ...
28 days ago
... Low Power Principal Engineer/ASIC Engineer to join our ... Key Responsibilities: - Low power design and verification (UPF, VCLP) ... analysis - Synthesis and physical design (DC synthesis) Requirements: ... experience in ASIC design, low power design, and verification ...
15 days ago
... Engineer Key Responsibilities: 1. Perform pre-layout synthesis to optimize digital designs ... and resolve timing issues, optimizing design for performance and power. 4. ... cross-functional teams to ensure design meets requirements. Requirements: 1. Education: ...
17 days ago
... Frontend Synthesis/STA Engineer Job Summary We are ... analysis. Key Responsibilities 1. Design and implement digital circuits ... and optimization of digital designs. 3. Conduct static timing ... analysis (STA) to ensure design meets timing requirements. 4. ...
28 days ago
... : Power Estimation & Low Power Verification Engineer Location: San Jose, CA Job ... Power Estimation & Low Power Verification Engineer to work with our team ... and UPF - Supporting UPF for design, DV, and implementation teams - Verifying ...
2 days ago