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Jobs and careers for system debug lead engineer in California (2 jobs)

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  • Sivaltech
  • San Diego
... seeking a skilledDesignVerificationEngineerwith strong expertise in System Verilog (SV) and UVM methodologies ... theverificationenvironment.Responsibilities:Develop, enhance, and debug System Veri
4 days ago
  • Reveille Technologies
  • Sunnyvale
... / Permanent Role Role: Design Verification Engineer Location : Sunnyvale CA / Austin TX ... good debugging skills. Build UVM/System Verilog-based verification environments for ...
15 hours ago