Description: (hands-on and AXI experience).Should be good in hands-on using SV/UVM.AMBA (especially AXI is a must)Experience in updating sequence, test, running and debuggingExperience in PCIE or C based is a plus
12 hours ago
... main function of the Verification Engineer is to work with a group ... of researchers and engineers to own the electrical system ... to define verification requirements, create test cases, design and implement the ...
21 days ago
Description: Title: Verification Engineer Location: San Jose, CA (5 days ... Functional Verification (SV/UVM) Software (Test) and Hardware (Emulation) ValidationWhat we ...
26 days ago