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Jobs and careers for design verification pcie in Cupertino (1 jobs)

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  • Yoh - A Day & Zimmerman Company
  • Cupertino
... experience with PD. Tools, flow, & design methodology from RTL synthesis to ... UPF-based low power design methodologies, power verification, synthesis, scan insertion/ATPG ... , formal verification, floor planning, placement, CTS, routing, ...
16 days ago