Description: Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) ... Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years ...
6 days ago
Description: Role: RTL Integration Engineer Location: Sunnyvale CA (On-Site) ... : Experience: Proven experience in RTL design and integration (using Verilog, VHDL ... ). Hands-on experience with digital design verification and subsystem integration. Experience ...
5 days ago
... As a Staff Antenna Simulation and Design Engineer at GM, you will architect ...
6 days ago
... schematics, technical design specifications, interface design, design diagrams and test specifications with design engineers. Helps
a day ago