Description: Role: Design Verification Engineer Location: Mountain View, CA (Hybrid) ... Type: Contract Job Description Design Verification Engineer Key Responsibilities: 08-14 Years ...
4 days ago
Description: Strong expertise along-with complex SoC/IP debug is must At-least 5+ years of experience in System Verilog HVL and C/C++. AMBA AXI bus along-with ARM or C based processor Experience in complete verification cycle which includes development of ...
19 hours ago
... : Senior Machine Learning Software Engineer We are seeking a highly skilled and experienced Senior ... Machine Learning Software Engineer to join our dynamic ...
20 hours ago
... experience in PCIe Gen5 characterization 2. Engineer should be well versed in ... work with Synopsys, firmware, and design teame, in planning the testing ...
3 days ago
$70
$80
an hour
Description: Python Automation Engineer W2 Contract Salary Range: $145, ... Summary: As a Python Automation Engineer, you will design, develop, and deploy efficient ...
3 days ago
Description: PCIe Gen5 Validation Engineer Mountain View CA (Onsite) Contract 5+ ... experience in PCIe Gen5 characterization Engineer should be well versed in ... work with Synopsys, firmware, and design teams in planning the testing ...
4 days ago
... Title: PCIe Gen5 & SERDES Characterization Engineer Location: Mountain View CA (Onsite ... seeking an experienced PCIe Characterization Engineer with 5+ years of expertise in ... closely with Synopsys, firmware, and design teams to plan, execute, and ...
4 days ago
Description: Job Description Hybrid: This means the successful candidate is expected to report to their primary location (Mountain View, California) three times per week, at minimum. Relocation: This job may be eligible for relocation benefits The Role: ...
5 days ago