Description: Title:Silicon Verification Engineer 5Location: Mountain View,CA(Hybrid) ... Chip/full system level ASIC Verification skills, and debug skills a must ...
25 days ago
... Define, document, and implement a UVM verification environment including agents and scoreboards ... checkers, coverage, and other verification collateral - Run tests on RTL ... recommend fixes - Support post-silicon verification activities of the products working ...
13 days ago
... Responsibilities Own the functional post-silicon validationDevelop and execute test ... plans for post-silicon validationUtilize scripting languages such ... validation processes Mandatory Skills Post Silicon Validation, Bringup Experience on board ...
a day ago
... communications. If you're a collaborative engineer or scientist who has a passion ... computers and developing high-speed silicon photonics-based optical interconnect solutions ...
25 days ago