... Pre-Layout Synthesis and STA Engineer Key Responsibilities: 1. Perform pre-layout synthesis ... to optimize digital designs ... cross-functional teams to ensure design meets requirements. Requirements: ...
18 days ago
... Low Power Principal Engineer/ASIC Engineer to join our ... Key Responsibilities: - Low power design and verification (UPF, VCLP) ... analysis - Synthesis and physical design (DC synthesis) Requirements: ... experience in ASIC design, low power design, and verification ...
16 days ago