... seeking a Low Power Principal Engineer/ASIC Engineer to join our team ... ! Key Responsibilities: - Low power design and verification (UPF, ... VCLP) - Power analysis and optimization (PTPX) ... in ASIC design, low power design, and verification - ...
a day ago
... : Pre-Layout Synthesis and STA Engineer Key Responsibilities: 1. Perform pre-layout ... optimize digital designs for area, power, and timing. 2. Conduct static timing ... , optimizing design for performance and power. 4. Collaborate with cross-functional teams ...
2 days ago