... Description: Summary The ASIC Engineer is responsible for designing ASIC and FPGA used in ... validation. Responsible for supporting our ASIC/FPGA development effort including FPGA ... synthesis, Timing constraints, ASIC backend support, FPGA low level ...
15 hours ago
Description: The team is looking for a Design-for-Test (DFT) contractor to test and validate next-generation semiconductor chips. The candidate will be responsible for working with Front End and Physical Design teams to implement DFT and test designs that ...
7 days ago
... experienced, full-time RFIC Test Engineer (contracting position) to join our ...
6 days ago