... The ASIC Engineer is responsible for designing ASIC and FPGA used in ... for supporting our ASIC/FPGA development effort including FPGA synthesis, Timing constraints ... , ASIC backend support, FPGA low level tests on prototyping ...
15 days ago
... The ASIC Engineer is responsible for designing ASIC and FPGA used in ... for supporting our ASIC/FPGA development effort including FPGA synthesis, Timing constraints ... , ASIC backend support, FPGA low level tests on prototyping ...
20 days ago
Description: The team is looking for a Design-for-Test (DFT) contractor to test and validate next-generation semiconductor chips. The candidate will be responsible for working with Front End and Physical Design teams to implement DFT and test designs that ...
27 days ago
... experienced, full-time RFIC Test Engineer (contracting position) to join our ...
26 days ago