... : Job Title: FUSA/CPU DV Engineer Location: California, USA Job Summary ... an experienced FUSA/CPU DV Engineer to join our team at ... background in automotive electronics and software development. This role involves leading ...
15 days ago
... Posted: 2025-09-24 Category: Software Subcategory: SW Systems Engr Schedule ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... SAIC is seeking a Senior Test Engineer to lead and support advanced ...
8 days ago
... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... Hardware Electrical Engineer in San Diego, CA specializing in Software Defined Radio ...
15 days ago
... Clearance Required: TS/SCI Clearance Level Must Be Able to Obtain ... a TS/SCI cleared Senior Data Engineer in support of NAVWAR's Naval ... San Diego, CA. The Data Engineer will to support
a day ago
... Clearance Required: TS/SCI Clearance Level Must Be Able to Obtain ... a cleared (TS/SCI) Senior Platform Engineer in support of NAVWAR's Naval ... San Diego, CA. As a Platform Engineer suppo
a day ago
... : Engineering and Sciences Subcategory: Systems Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... Secret cleared Model Based Systems Engineers (MBSE) in support of NAVWAR ...
a day ago
... Engineering and Sciences Subcategory: Test Engineer Schedule: Full-time Shift: ... Clearance Required: Secret Clearance Level Must Be Able to Obtain ... seeking Test & Evaluation (T&E) Systems Engineers in support of NAVWAR's Naval ... , CA. The T&E Sys Engineer will
a day ago
... and Sciences Subcategory: Machine Learning Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ...
a day ago
... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... a Model Base Systems Engineering (MBSE) Engineer to support our San Diego ...
a day ago
... : Engineering and Sciences Subcategory: Systems Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... SAIC is seeking a Principal Systems Engineer to support the Tactical Networks ...
a day ago
... : Engineering and Sciences Subcategory: Systems Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... Description SAIC is seeking a Systems Engineer Team Manager to support The ...
4 days ago
... power analyzers - Experience with PCB-level mixed-signal validation/debug on ...
4 days ago
Description: Role: Data Engineer Location: Acton, MA 01720/ San ... term Contract Key Responsibilities: 1) High level of SQL Knowledge - Write and ...
4 days ago
... Enterprise IT Systems Engineer Key Role: Support enterprise-level IT infrastructure and ...
4 days ago
$142,254
a year
... to the GS-13 grade level or pay band DP-03 ...
5 days ago
$142,254
a year
... to the GS-13 grade level or pay band DP-03 ...
5 days ago
... : Engineering and Sciences Subcategory: Systems Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... SAIC is seeking a Senior Systems Engineer to support one of our ...
7 days ago
... : Engineering and Sciences Subcategory: Test Engineer Schedule: Full-time Shift: Day ... Minimum Clearance Required: Secret Clearance Level Must Be Able to Obtain ... SAIC is seeking a Engineering Test Engineer specialized in Remus and Waveglider ...
7 days ago
... to the GS-12 grade level or pay band in the ...
10 days ago
... Clearance Required: TS/SCI Clearance Level Must Be Able to Obtain ... is seeking cleared (Secret) Data Engineer / Architect to support a recently awarded ...
14 days ago