... -22 Category: Software Subcategory: SW Engineer Schedule: Full-time Shift: Day ... SAIC is seeking a Senior Principal Software Engineer to support advanced Very Low ...
2 days ago
Description: Job Title:DesignVerificationEngineerLocation:San Diego, CAExperience Level: 7+ YearsJob Description:We are seeking a skilledDesignVerificationEngineerwith strong expertise in System Verilog (SV) and UVM methodologies to join our team. The ...
10 days ago
... : Engineering and Sciences Subcategory: Test Engineer Schedule: Full-time Shift: Day ... Test and Evaluation (T&E) Engineer in San Diego, CA. T&E Engineer will support PEO ...
3 days ago
Description: Sr. Hardware Engineer ( Semiconductor ) 12 months contract ... Coverage 5. System Verilog Assertions Design Verification<> JOB DESCRIPTIONGeneral Summary: Join design ... verification team in verifying the high ...
13 days ago
... Senior; up to $220k for Principal Candidate must be eligible to ...
4 days ago
... Senior; up to $220k for Principal Candidate must be eligible to ...
11 days ago
... Job Description As the Senior Engineer in Software Quality Engineering, you ... efforts to deliver quality centric V&V (Verification & Validation) testing Job Description ...
5 days ago