Description: Verification Engineer Location - Bay Area, CA Type: ... Verification and Hardware Verification Methodology (e.g., System Verilog, OVM/VMM/UVM) with ...
22 hours ago
Description: (hands-on and AXI experience).Should be good in hands-on using SV/UVM.AMBA (especially AXI is a must)Experience in updating sequence, test, running and debuggingExperience in PCIE or C based is a plus
15 days ago