Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... SoC platforms.Define comprehensive test plans and execute tests covering memory training ...
9 days ago
Description: Position: Hardware Design Engineer (Architect) Location: San Jose, USA ... High-performance computing (HPC) ,datacenter application or OCP (open computing platform ...
4 days ago