Description: JD: Signal Integrity (SI) and Power Integrity (PI) EngineerRole: Signal Integrity Engineer should support high-speed interface development and validation.The engineer will work on state-of-the-art technologies such as LPDDR5X, PCIe Gen7, and ...
14 days ago
Description: Requirements/Skills: Possess Mentor Graphics, Cadence, PLA knowledge Multiple layers package design (8+) experience Understanding of substrate manufacturing design rule and assembly rule Possess Flip Chip Package Design Concept Good ...
14 days ago