Description: Position: Thermal Test Engineer Location: San Jose, CA (Onsite) ...
26 days ago
Description: Role - System Validation Engineer Location - San Jose, CA onsite ...
28 days ago
Description: Position: EMC Test Engineer Location: San Jose (Onsite) Responsibilities: ...
28 days ago
Description: Responsibilities & Opportunities In This Role Technical Leadership: Lead hardwaresystems design projects guide design and architecture decisions that align with strategic objectives.CrossFunctional Collaboration: Partner with Silicon ...
a day ago
Description: <> Key Responsibilities & LPU Focus: LPU Integration:You would be responsible for designing products based on theGroqChip LPU(Language Processor Unit) AI/ML processors. Board-Level Design:LeadPCB layoutandSI/PI analysis(Signal Integrity/Power ...
5 days ago