... a mixed signal chip (ADC), Digital based simulation environment, Test bench not ... need to develop models, Develop test plan etc.. System Verilog, Unix/Linux ... , Cadence tools Xcelium, Windows based tools.
8 days ago
... a mixed signal chip (ADC), Digital based simulation environment, Test bench not ... need to develop models, Develop test plan etc.. System Verilog, Unix/Linux ... , Cadence tools Xcelium, Windows based tools.
a day ago