... a highly skilled and motivated DFT Engineer with 6+ years of experience to ... will have strong expertise in Design for Testability (DFT) methodologies, test ... . You will work closely with design, verification, and product engineering teams ...
6 days ago
Description: JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, ...
23 hours ago