... a highly skilled and motivated DFT Engineer with 6+ years of experience to ...
6 days ago
... Integrity Engineer with at least 5 years of experience is needed to support ... high-speed interface development and validation. The engineer will ...
6 days ago
... (> 5y) Signal & Power Integrity Engineer to support high-speed interfaces (LPDDR5X, PCIe ...
6 days ago
Description: JD Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, ...
14 hours ago