Description: Title: DFX RTL Design Engineer - Hybrid Mandatory skills: RTL, RTL design, RTL checks, RTL coding, RTL implementation, Gbit SERDES, UCIe, PCIe I/F, DFX RTL coding, DFX RTL integration, Verilog, system verilog, lint, elab, CDC, RDC, SOC, JTAG, ...
a day ago
Description: Title: ASIC Verification Engineer - Hybrid Mandatory skills: UVM, UVM design verification, UVM verification, UVM environment, AISC, SOC, AISC verification, SOC verification, DV tools, DV methodologies, CPU, I/O, Cadence, Synopsys Verification ...
a day ago