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Jobs and careers for architectural designer from the company Zachary piper solutions, llc in San Jose (12 jobs)

Zachary piper solutions, llc
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FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , and collaborating closely with RTL designers to debug failures. The FPGA ...
3 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , test sequences, and collaborate with designers to debug failures
3 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... UVM. Collaborate closely with RTL designers to debug and resolve design ...
5 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... UVM. Collaborate closely with RTL designers to debug and resolve design ...
6 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... UVM. Collaborate closely with RTL designers to debug and resolve design ...
9 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , test sequences, and collaborate with designers to debug failures
10 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , and collaborating closely with RTL designers to debug failures. The FPGA ...
10 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... UVM. Collaborate closely with RTL designers to debug and resolve design ...
12 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , test sequences, and collaborate with designers to debug failures
13 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , and collaborating closely with RTL designers to debug failures. The FPGA ...
14 days ago

FPGA Design Validation Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... , test sequences, and collaborate with designers to debug failures
15 days ago

FPGA Verification Engineer

  • Zachary Piper Solutions, LLC
  • San Jose
... UVM. Collaborate closely with RTL designers to debug and resolve design ...
17 days ago
FPGA Verification Engineer FPGA Design Validation Engineer

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