Description: Position: PCIe Validation Engineer Experience: 5 8 Years Location : San ... Highlights: PCIe subsystem validation on SoC platformsPost-silicon bring-up and debuggingFirmware ...
4 days ago
... HPC/data center systems, custom silicon, and high-speed interfaces such ... , PCB layout, board bring-up, validation, debugging, and end-to-en
4 days ago