Description: Position: PCIe Validation Engineer Experience: 5 8 Years Location : San Jose , ... -silicon bring-up and debuggingFirmware integration and PCIe trainingPerformance and reliability ...
10 days ago
Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... SoC platforms.Define comprehensive test plans and execute tests covering memory training ...
11 days ago
... platforms. Define comprehensive test plans and execute tests covering memory training procedures ...
11 days ago