Description: Role: Design Verification Engineer Location: San Jose CA/ ... random techniques for SOCs with embedded CPUs and mixed signal ... , System Verilog, SVA Develop test plans and coverage metrics from ... write block and chip-level tests in C,SV,UVM Debug ...
4 days ago
... Java Application Architect to reverse engineer data access and transactional behavior ... . The role focuses on extracting embedded SQL, reconstructing transactional workflows, and ...
2 days ago
... : Job Tittle: Senior Platform Software Engineer Location: San Jose, CA (Onsite ... ROS 2 Experience working with NVIDIA embedded systems (e.g., Orin, Xavier
3 days ago
... defining and implementing platform host test procedures, as well as carrying ... out host design test characterization and qualification. The focus ...
4 days ago