Description: Position: PCIe Validation Engineer Exp: 5-8 years PCIe Gen 4/5/6, CXL, ... SoC platforms.Define comprehensive test plans and execute tests covering memory training ... reliability.Collaborate with design and firmware teams to develop, i
a day ago
... platforms. Define comprehensive test plans and execute tests covering memory training procedures ... reliability. Collaborate with design and firmware teams to develop, integrate, and ...
23 hours ago