Description: Staff Machine Learning Engineer, LLM Fine-Tuning (Verilog/RTL Applications)Level: Staff ... working with Verilog/SystemVerilog and RTL artifacts. This includes code generation ... constraint translation, and spec-to-RTL assistance. You ll lead a small ...
4 days ago
Description: Role: Staff Machine Learning Engineer Location: San Jose, CA (Onsite) ... reason over Verilog/SystemVerilog and RTL artifacts-code generation, refactoring, lint ... spec to RTL assistance. We're looking for a Staff level engineer to ...
4 days ago
... for a hands-on Physical Design Engineer to support complex SoC projects ... collaborate with customers, frontend, and integration teams to ensure successful tape ...
a day ago
... and security controls to allow integration of acquired companies into our ...
3 days ago
... looking for Data Migration Engineer for our client ... Job Title: Data Migration Engineer Job Location: San Jose ... 72hr - $77hrThe Data Migration Engineer will work with Adobe s ... This role involves building integrations across multiple enterprise systems, ...
a day ago
... Description: As an EDA Product Engineer you will be responsible for ... , developing, testing and delivering software integrations. You will work closely with ...
3 days ago