Description: Role: Mixed-Signal Verification Engineer Location: San Jose, CA 100% ... of digital design for mixed-signal control loops and experience writing ...
19 days ago
... an opening for Mixed-Signal Design Verification Engineer with our Client at ... of digital design for mixed signal control loops and designing Verilog ...
22 hours ago
$50
$65
an hour
Description: Title: Mixed-Signal Design Verification Engineer Location: San Jose, CA Key ... of digital design for mixed signal control loops and designing Verilog ...
20 days ago
Description: Role: Post-Silicon Validation Engineer Location: San Jose, CA Hybrid ... background in SOC/VLSI/Mixed Signal IC bring-up, production testing ...
19 days ago