... Ganesan Email: Cell: Job Title: Silicon Validation Engineer Location: San Jose, CA Duration ... ) Job Description: Silicon Validation experience - validation for EE (Electrical Electronics) Silicon validation processes and system ...
27 days ago
... : Job Title: Power & Performance (PnP) Validation Engineer Location: San Jose, CA Company ... system bring-up.Execute post-silicon validation lifecycle for PnP features.Verify ...
4 hours ago
Description: Job Title: Hardware Validation Engineer Location: San Mateo, CA (Complete ... are seeking a driven and versatile engineer to help drive safety and ... design iteration and robust product validation for state-of-the-art ...
20 days ago
Description: Position: 1- Firmware Engineer C, C++ microcontrollers, UART, I2C, SPI, USB, ... , IoT Development, Hardware Integration. position: 2- Validation Engineer VHDL, Verilog, Hardware Description Languages ...
12 days ago
Description: PSV Memory Validation & Emulation Engineer Experience: 5 to 8 years Salary Range: ... Define, develop, and execute functional validation for integrated SoCs, focusing on ... to ensure validation coverage and performance goals. Perform silicon debug to ...
3 hours ago
Description: Senior Field Applications Engineer w/ RDMA #R022847 Technical lead for ... leading edge industry standard switch silicon (XGS and DNX) family. Responsibilities ...
6 days ago
Description: Principal Digital Design Engineer A premier chip and silicon IP provider focused on ... an exceptional Principal Digital Design Engineer to join its Memory Interface ... of the industry s most innovative engineers on cutting-edge technology that ...
12 days ago
... and silicon IP provider is looking to hire a talented Principal Verification Engineer ... some of the industry's top engineers to help develop cutting-edge ... -time role, the Principal Verification Engineer will report to the Director ...
16 days ago
... Description: Principal Design Verification Engineer A leading chip and silicon IP provider focused on ... an outstanding Principal Design Verification Engineer to join its Memory ... security. As a Principal Design Verification Engineer, you ll play a critical ...
16 days ago
... are looking for a Networking P4 Engineer - Location: San Jose, CA ... Position. Job Title: Networking P4 Engineer Location: San Jose, CA ... experienced and driven Networking P4 Engineer to join Cisco's cutting- ... and compilers based on Cisco Silicon One arc
25 days ago
Description: PSV PCIE Validation & Emulation Engineer Experience: 5 to 8 years Salary Range: ... Description: Create and document PCIe validation test plans, test cases, and ... teams for successful integration and validation of PCIe subsystems. Must Hav
3 hours ago
... Gen AI / ML Application Testing Engineer (BA + QA) Location :: ... for a detail-oriented engineer with experience in Gen ... business analysis, and product validation. You will help shape ... through systematic testing, prompt validation, and tool-driven evaluation. ...
23 days ago
Description: Position: Sr. Hardware Engineer Location: Sanjose (Onsite) (Locals Need) ... engineers to complete the designs Bring up systems and execute engineering validation ...
28 days ago
... my email to them. Title: Silicon Validation EngineerLocation: San Jose, CA Job ...
13 days ago
... for a highly skilled Senior Validation Engineer to lead the testing and ... validation of semiconductor components, data ... strong experience in System Level Validation, which includes rack level ... , executing, and analyzing validation tests,
3 hours ago