Description: Position Title: CAD/EDA Silicon Design/Verification Infrastructure Engineer Location: Santa Clara, CA Term: Possible 3-Month Contract-to-Hire (CTH) Job Description: We are seeking a CAD/EDA Silicon Design/Verification Infrastructure Engineer ...
4 days ago
Description: Position: Analog Layout Design Engineer Location: Santa Clara, CA Contract Type: 3-Month Contract-to-Hire Responsibilities: Perform layout of cutting-edge, high-performance, high-speed CMOS ICs in mature foundry nodes (40nm, 55nm, 65nm, 130nm ...
10 days ago