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Jobs and careers for silicon design package engineer from the company Technical link in Santa Clara (2 jobs)

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Hardware System Validation Engineer

  • Technical Link
  • Santa Clara
Description: Job Description/Responsibilities Design system validation testcases, including PCIE ...
27 days ago

IC Packaging

  • Technical Link
  • Santa Clara
... . Job Responsibilities Experience with 2.5D package design and development like CoWoSStrong expertise ... tools like Cadence APDUnderstanding IC package design requirements for high speed interfaces ...
16 days ago

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