Description: Design Verification Engineer - CPU Subsystem Looking for a Design Verification Engineer to play a ... UVM, with a focus on developing verification environments, executing test plans, & ... , UVC development, & verification of complex protocols like ...
25 days ago
Description: Design Verification CPU Core & Block Looking for a ... feature/test plan verification engineer responsible for ISA & microarchitectural verification. This will be ... Santa Clara, CA. Scope: Functional verification with emphasis on core level ...
24 days ago
Description: RTL Design Engineer Looking for a solid RTL Design Engineer who has a strong background ... in RTL Design and also have an understanding of verification flows. ... This person should be a strong engineer and be ...
9 days ago