Description: Job Title: RTL Engineer: Integrate RISC-V Core to ... 5+ years of experience in RTL design, SoC integration, or related ... Verilator).Deep understanding of SoC design, integration, and high-performance ... to debug and optimize designs for functiona
17 minutes ago
... Job Title: Principal Advanced Packaging Engineer Semiconductor & Chiplet Integration Location: Santa ... an experienced Principal Advanced Packaging Engineer with deep expertise in ... integration, and high-speed interconnect design. This role will lead advanced ...
12 hours ago