Description: Job Title: Senior Deep Learning Engineer/AI-ML Engineer Location: Santa Clara, California ... We are team of chip design, analog and AI domain experts ...
4 hours ago
Description: Job Title: RTL Engineer: Integrate RISC-V Core to SoC ... skills: 5+ years of experience in RTL design, SoC integration, or related areas ... , Verilator).Deep understanding of SoC design, integration, and high-performance interfaces ...
18 hours ago
... modernization and automation-ideal for engineers passionate about scalable, next-gen ...
20 hours ago