Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experienceStrong SystemVerilog programming skillsHands-on experience with UVM (Universal Verification ...
17 hours ago
... , and reporting logicConduct data profiling, validation, and reconciliation against source systemsPerform ... KPI validation, ensuring accuracy of metric definitions ...
21 hours ago