... master s degree with 4+ years of CAD engineering experience Experience in scripting ... PythonProficient in using industry-standard design software, including Cadence Virtuoso, ... working with analog and digital design flowsExcellent communication skills and ...
12 days ago
... are looking for RTL Design Engineer - Specialized for our client ... CA Job Title: RTL Design Engineer - Specialized Job Location: ... Analog-Mixed Signal RTL Design Engineer will be responsible for ... running quality checks, debugging design issues, and providing ...
25 days ago
... performance validation.Identify and resolve design issues in collaboration with engineering ... teams.Participate in design reviews and contribute to verification ... of FPGA, ASIC, and RTL design.Hands-on experience with SystemVerilog ...
28 days ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification ...
a day ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experienceStrong SystemVerilog programming skillsHands-on experience with UVM (Universal Verification ...
3 days ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification ...
7 days ago
... deployment. Own the Architecture: Lead the design and implementation of large-scale ... Execution: Serve as the project lead, aligning key stakeholders-from Product ...
29 days ago
... engineer Santa Clara - California Contract Job description Ability to lead the design and ... APIs and secure workflowsEnsure system designs meet enterprise requirements for security ...
19 days ago
Description: Title: Agentic AI Engineer Location: Santa Clara, CA Duration: 6+ ... Job Description: Ability to lead the design and development using NVIDIA BluePrints ...
18 days ago
Description: Title: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA-Onsite ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation. Develop forward ...
7 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
17 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
18 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
19 days ago
... : Job Title FPGA RTL design and Board validation Location: ... a highly skilled Senior FPGA Design Engineer with 7 to 15 years ... of experience in RTL design, IP design and development, and FPGA ... have a strong background in design debugging and a deep familiarity ...
22 days ago
... looking for a AI Engineer for our client in Santa ... CA Job Title: AI Engineer Job Location: Santa Clara ... - $65hrThe Generative AI Design Engineer will design, develop, and optimize generative ... as content creation, product design, intelligent automation, and ...
4 days ago
Description: Role: GenDesign / Inverse Design Ai Engineer Location: Santa Clara, CA Must ... are seeking a Generative AI (GenAI) Design Engineer to join our team and ...
5 days ago
... are seeking a Generative AI (GenAI) Design Engineer to join our team and ... such as content creation, product design, and intelligent automation.Develop forward ...
8 days ago
... are looking for DFT / ATPG Engineer for our client in Santa ... , CA Job Title: DFT / ATPG Engineer Job Location: Santa Clara, CA ... : Pay Range: $82hr - $103hrThe DFT Design Engineer will be part of the ... DFT design team responsible for scan/ATPG ...
25 days ago
... motivated and skilled FPGA Verification Engineer to join our dynamic team ... the verification of complex FPGA designs, ensuring their functionality, performance, and ... . You will work closely with design engineers to develop and execute verification ...
15 days ago
Description: FPGA Verification Engineer Day1 Onsite (Santa ... and skilled FPGA Verification Engineer to join our dynamic ... verification of complex FPGA designs, ensuring their functionality, ... will work closely with design engineers to develop and execute ...
18 days ago