Description: Role: QA Test Lead with Scrum Master experience Location: ... and facilitating Agile best practices. Lead Sprint Planning and ensure seamless ...
25 days ago
... Test Engineer to join our growing, remote team. In this lead role ... , you will be responsible for driving the overall QA ... , etc.). You will lead a team of test engineers and work cross-functionally ...
a month ago
... test). Your duties include characterization, QA, test, yield enhancement and spec ...
7 days ago
... Copy Advanced IC Package Design Engineer (CoWoS / 2.5D Packaging)Marvell Santa ... . 2 interviews, first one with team lead, second one with manager and ...
6 hours ago
... - Santa Clara CA Network Integration Engineer 10+ years of experience in ... RF design principlesProven ability to lead large-scale wireless network projects ...
3 days ago
... , California in 2004 when a visionary engineer, Fred Luddy, saw the potential ...
15 days ago
... . Our Approach to Work We lead wit
26 days ago
... : Job Title: FPGA Design Verification Engineer/Technical Lead II - VLSI Location: Santa ...
27 days ago
Description: Title: Agentic AI Engineer Location: Santa Clara, CA Duration: 6+ ... AI Job Description: Ability to lead the design and development using ...
27 days ago
Description: AI engineer Santa Clara - California Contract Job description Ability to lead the ...
28 days ago
Description: Company Description Our Mission At Palo Alto Networks everything starts and ends with our mission: Being the cybersecurity partner of choice, protecting our digital way of life. Our vision is a world where each day is safer and more secure ...
14 days ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification ...
10 days ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experienceStrong SystemVerilog programming skillsHands-on experience with UVM (Universal Verification ...
12 days ago
Description: Mandate Skills: FPGA Verification Exp Strong SystemVerilog coding (Universal Verification Methodology)-UVM 5+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification ...
16 days ago
Description: This company is one of the fastest growing interconnectivity organizations in the world. Their products and services provide modern data center with the right tools for space saving and efficient energy and data connectivity services! This ...
28 days ago
... the brightest and most talented engineers and technologists in the industry ... to support the strategy and lead R&D investigations that deliver industry leading ...
7 days ago
... the brightest and most talented engineers and technologists in the industry ... to support the strategy and lead R&D investigations that deliver industry leading ...
14 days ago
... the brightest and most talented engineers and technologists in the industry ... to support the strategy and lead R&D investigations that deliver industry leading ...
19 days ago
... the brightest and most talented engineers and technologists in the industry ... to support the strategy and lead R&D investigations that deliver industry leading ...
20 days ago