Description: FPGA Verification Engineer Santa Clara, CA- 5days onsite Mandatory Areas Must Have Skills FPGA Verification Engineer Skill 1 8 + Years of in FPGA Skill 2 5 +Years of Exp in UVM Skill 2 5 +Years of Exp in System Verlilog Job Description: We ...
11 days ago
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
11 days ago
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
14 days ago
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
16 days ago
Description: 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification tools (e.g., QuestaSim, Synopsys VCS) ...
18 days ago
Description: Mandate Skills: FPGA ,System verilog coding,UVM 3+ years of FPGA verification experience Strong SystemVerilog programming skills Hands-on experience with UVM (Universal Verification Methodology) Familiarity with industry-standard verification ...
18 days ago
Description: Role: FPGA Verification Engineer (19921-1) Location: Santa Clara, CA - Onsite Duration: 12+ Months Contract Client: Applied Materials Rate: Currently 58/70 but we can try for 90/h C2C as well if the candidate is fine. Must Have Skills - Skill ...
18 days ago