... Corporation ( is currently seeking Network Engineer for location US - CA - Santa ... . Meta Facebook Job Title - Network Engineer Beeline ID: 60572-1 Duration: 12 ...
8 days ago
$35
$45
an hour
... : Japanese Speaking Jr. Embedded Software Engineer (EtherCAT Specialist, Japanese Bilingual) - Entry ... and detail-oriented Jr. Software Engineer to join our dynamic team ...
14 days ago
Description: Role: AI and BSP engineer (Embedded Systems) Location : Santa Clara, ... for the AI and BSP engineer: Linux Systems Linux driver development ...
14 days ago
... : Job Title: Computer Vision Analytics Engineer Medical Video/Image Analytics Duration ... are seeking Computer Vision Analytics Engineers to support a Medical Video Analytics ...
16 days ago
Description: Job Title: Application Engineer Duration: 12+ Months Contract Location: ... : We are hiring an application engineer to support product development, customer ...
a month ago
Description: Description: We are seeking a skilled and detail-oriented Chromebook Benchmarking & Pathfinding Data Analyst to join our team. In this role, you will be responsible for performing rigorous benchmarking on Google Chromebooks. You also will be ...
2 days ago
Description: Please note that this is a 6-month contract position. Preferred Skills and Experience: - Experience working in the Medical Device/Pharma/Biotech field - Experience with computerized management systems, such as SAP, Maximo, BMRAM or CERDAAC or ...
7 days ago
Description: 6+ years of work experience responsible for designing, deploying and operating large-scale networksExperience working in a multi-vendor environment with hands-on experience with networking hardware Proven experience managing multiple projects ...
8 days ago
Description: Please note that this is a 6-month contract position. Preferred Skills and Experience: - Experience working in the Medical Device/Pharma/Biotech field - Experience with computerized management systems, such as SAP, Maximo, BMRAM or CERDAAC or ...
8 days ago
Description: FPGA & AI Model Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on FPGA.RTL Development & Optimization: Proficiency in MATLAB, C, Python, GO and FEC.Parallel Computing & Memory Management: Expertise in POSIX threads, SMP ...
14 days ago
Description: Required: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural document from requirements specifications Experience developing designs from scratch ...
23 days ago
Description: Looking for Lead layout design for high-performance analog cores (ADCs, DACs, PLLs, transceivers) in CMOS process nodes (5nm to 65nm). Set up LVS, DRC, and ERC environments, debug using Cadence and Mentor tools. Perform floor planning, ...
26 days ago
... for data paths, routing, and security.Develop software using CNF/VNF ...
23 days ago
... . Developer will work and lead engineers to customize Salesforce by creating ...
a day ago
... conferencing. Provide support to UC engineers for Telecom projects, perform statistical ...
8 days ago
Description: Job Title: Lead Engineer - AI and FPGA Integration Expert ...
23 days ago
... been in an Architect / Consultant / Engineer role where she/he has ...
a month ago
... been in a Senior Architect/Consultant / Engineer role where she/he has ...
a month ago
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