Description: DESCRIPTION Job Title: CPU Performance Engineer (1325700) Location: Hybrid - Santa Clara, ... We are looking for a CPU performance engineer, who will participate in ... research on next generation CPU architecture ...
24 days ago
... looking for Senior ASIC/RTL Design Engineer for our client in Santa ... Job Title: Senior ASIC/RTL Design Engineer Job Location: Santa Clara, CA ... of the design and implementation of blocks to meet functional, timing, area ...
5 days ago
Description: Role Title: ASIC/RTL Design Engineer - Senior Location: San Jose, CA (4 ... of the design and implementation of blocks to meet functional, timing, area ... . Work with verification and physical design teams to achieve high quality ...
5 days ago
Description: Title: RTL Design Engineer Project Location: Santa Clara, CA - ... JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation ... for linting and simulation of design. Work with synthesis and backend ...
17 days ago
... Medical devices (Embedded Engineer) Test Planning, Test case design, Test cases writing ...
5 days ago
... Medical devices (Embedded Engineer) Test Planning, Test case design, Test cases writing ...
6 days ago