Description: FPGA & AI Model Integration: Experience with PyTorch, LLM on SoC, and AI acceleration on FPGA.RTL Development & Optimization: Proficiency in MATLAB, C, Python, GO and FEC.Parallel Computing & Memory Management: Expertise in POSIX threads, SMP ...
14 days ago
Description: NVIDIA's invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI - the next era of computing - with ...
15 days ago
Description: Required: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural document from requirements specifications Experience developing designs from scratch ...
23 days ago
Description: Looking for Lead layout design for high-performance analog cores (ADCs, DACs, PLLs, transceivers) in CMOS process nodes (5nm to 65nm). Set up LVS, DRC, and ERC environments, debug using Cadence and Mentor tools. Perform floor planning, ...
26 days ago
Description: 8+ years of experience in software engineering, with a focus on cloud-native application development, at large organizations or innovative startups.5+ Experience and deep understanding for building connectors for Low Code / No Code and ...
27 days ago
Description: Job Description: Duties: Identify business needs by establishing personal rapport with actual, potential, and internal clients. Design, develop, and implement highly scalable client server programs in a cloud environment. Identify appropriate ...
a month ago
... looking for a hands-on Sr DevSecOps Engineer to join our growing Digital ... have a highly engaged team of engineers and are driving a new custom ...
a month ago
... and manage a team of test engineers in defining ATE test hardware ...
a day ago
... . Developer will work and lead engineers to customize Salesforce by creating ...
a day ago
... with other developers and lead engineers to customize Salesforce by creating ...
2 days ago
... and manage a team of test engineers in defining ATE test hardware ...
5 days ago
... conferencing. Provide support to UC engineers for Telecom projects, perform statistical ...
8 days ago
... updates to the line lead/ engineers of build/work status. In ...
8 days ago
... conferencing. Provide support to UC engineers for Telecom projects, perform statistical ...
8 days ago
... and manage a team of test engineers in defining ATE test hardware ...
9 days ago
... and manage a team of test engineers in defining ATE test hardware ...
13 days ago
... with other developers and lead engineers to customize Salesforce by creating ...
15 days ago
... and manage a team of test engineers in defining ATE test hardware ...
17 days ago
... level feature/test plan verification engineer responsible for ISA & microarchitectural verification ...
22 days ago
Description: Job Title: Lead Engineer - AI and FPGA Integration Expert ...
23 days ago