Description: Required: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural document from requirements specifications Experience developing designs from scratch ...
24 days ago
Description: Looking for Lead layout design for high-performance analog cores (ADCs, DACs, PLLs, transceivers) in CMOS process nodes (5nm to 65nm). Set up LVS, DRC, and ERC environments, debug using Cadence and Mentor tools. Perform floor planning, ...
27 days ago
Description: 8+ years of experience in software engineering, with a focus on cloud-native application development, at large organizations or innovative startups.5+ Experience and deep understanding for building connectors for Low Code / No Code and ...
a month ago
Description: Job Description: Duties: Identify business needs by establishing personal rapport with actual, potential, and internal clients. Design, develop, and implement highly scalable client server programs in a cloud environment. Identify appropriate ...
a month ago
... AV and webcast software and hardware. Training: Train staff on using ...
3 days ago
... such as testing, program and hardware checkout utilizing ATE and SLT ...
17 days ago
... such as testing, program and hardware checkout utilizing ATE and SLT ...
17 days ago
... a team of test engineers in defining ATE test hardware and software and ...
2 days ago
... a team of test engineers in defining ATE test hardware and software and ...
6 days ago
... a team of test engineers in defining ATE test hardware and software and ...
10 days ago
... a team of test engineers in defining ATE test hardware and software and ...
13 days ago
... a team of test engineers in defining ATE test hardware and software and ...
18 days ago
... . Developer will work and lead engineers to customize Salesforce by creating ...
2 days ago
... with other developers and lead engineers to customize Salesforce by creating ...
3 days ago
... conferencing. Provide support to UC engineers for Telecom projects, perform statistical ...
8 days ago
... updates to the line lead/ engineers of build/work status. In ...
9 days ago
... conferencing. Provide support to UC engineers for Telecom projects, perform statistical ...
9 days ago
... with other developers and lead engineers to customize Salesforce by creating ...
16 days ago
... level feature/test plan verification engineer responsible for ISA & microarchitectural verification ...
18 hours ago
... level feature/test plan verification engineer responsible for ISA & microarchitectural verification ...
23 days ago