Description: Summary Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could ...
16 days ago
... , Engineering Group > CPU Engineering General Summary: As a CPU performance projection engineer you will ... be responsible modeling and projecting the CPU ...
20 days ago
... , Engineering Group > CPU Engineering General Summary: As a CPU performance projection engineer you will ... be responsible modeling and projecting the CPU ...
29 days ago
... Area:Engineering Group, Engineering Group > CPU Engineering General Summary: NUVIA is ... talented and passionate engineers in the world to create designs that push ... , energy efficiency and scalability. As CPU Physical DesignCADengineer, you will buil
16 days ago
... all. As a Qualcomm GPU Engineer, you may architect, design, implement, verify, and ... power of GPU cores. Qualcomm Engineers collaborate with
17 days ago
... Area:Engineering Group, Engineering Group > CPU Engineering General Summary: Qualcomm is ...
16 days ago
... Description: Title: Silicon Design Engineer - Onsite Description: SENIOR SILICON DESIGN ENGINEER THE ROLE: This ... is a Physical Design Engineering role ... design from RTL to GDS with synthesis, Place n Route, timing, ...
20 hours ago
... Role Title: Sr. Physical Design Engineer / Sr. Silicon Design Engineer Location: Santa Clara, California ... ) THE ROLE: This is a Physical Design Engineering role that will require ... the design from RTL to GDS with synthesis, Place n Route, timing, and ...
16 days ago
... are looking for Senior Silicon Design Engineer for our client in Santa ... , CA Job Title: Senior Silicon Design Engineer Job Location: Santa Clara, CA ... -gigabit SerDes PHY designs. This includes automated synthesis and timing driven place ...
17 days ago
... Engineering General Summary: A SOC Physical Design Engineer plays a crucial role in the ... requires strong knowledge of physical design tools (like Cadence or Synopsys ... processes, and an understanding of timing closure, clock tree synthesis, power ...
28 days ago
... : RTL Design Engineer - Onsite Description: JOB DUTIES: Responsible for RTL design using Verilog ... for linting and simulation of design. Work with synthesis and backend ... Engineering KEY RESPONSIBILITIES: Perform RTL design of di
22 days ago
Description: Title: Physical Design Engineer (8-15 Years Experience) Location Santa ... Fulltime Job Description: As a Physical Design Engineer, you will play a crucial role ... and Cadence Innovus to optimize designs for performance, power, and area ...
28 days ago
... add an experienced Lead Mechanical Design Engineer to work within its Server ... , California. As a member of this design team, you will have the ...
21 days ago
... to join a world-class Digital Design Engineering group and take imaginative ... real world. You'll help design the tools that allow us ... extraordinary opportunity for Standard Cell Design Methodology a
9 days ago
... Engineer will develop ATE test solutions, both hardware and software, for design ... , analog and mixed signal ASICs designed by Qualcomm. We work with ... Design, System, Foundry, Program Management, Yield, ...
13 days ago
... a UEFI/BIOS Firmware Engineer with background in systems architecture ... responsible for the hardware design, development and delivery of ... and Oracle's on-premise engineered systems. This candidate will ... oriented environment to architect, design and implement U
21 days ago
... a UEFI/BIOS Firmware Engineer with background in systems architecture ... responsible for the hardware design, development and delivery of ... and Oracle's on-premise engineered systems. This candidate will ... oriented environment to architect, design and imple
21 days ago
Description: Role: Sr. IT Engineer Location: Onsite - 4275 Burton Dr, ... a Sr. IT engineer. You will be responsible for research, design, deploy, and ... IT daily support and Operation engineer to perform the best practice ...
3 days ago
... engineer responsible for storage infrastructure who has experience in the plan, design ... capacity planning. Job Responsibilities Evaluate, design, implement, and deploy SAN, NAS ...
9 days ago
... . As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or ...
20 days ago