... : Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin ... GDSII) - Experience with SoC level integration (multiple blocks, SoC floorplan, clocking ...
13 days ago
Description: ASIC Engineer (Design Verification) Bay Area, CA ...
13 days ago
Description: Skills Required Selenium- 5-10 Years Selenium WebDriver- 5-10 Years UI Automation- 5-10 Years WebApp UI Automation - 5-10 Years Generative AI - At least 1 year Functional Testing - 5-10 Years Java - 5-10 Years
25 days ago