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Jobs and careers for static timing analysis engineer in Sunnyvale (3 jobs)

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... : Title: Infra Silicon Physical Design Engineer Location: Bay Area, CA/Austin ... -on tape-out experience performing timing and physical verification closure on ... blocks, SoC floorplan, clocking, and timing analysis) preferred - Expertise in
6 days ago
  • Meta Platforms, Inc. (f/k/a Facebook, Inc.)
  • Sunnyvale
... positions in Sunnyvale, CA ASIC Engineer, Implementation: Run logic/physical synthesis ... optimized gate level netlist for Timing, Area, and Power. (ref. code ...
16 hours ago
... Desktop Senior Engineer Location: Sunnyvale CA (Onsite) Duration: 3 months+ Timing: 8:00 AM ... Overview An Ubuntu Desktop Senior Engineer is responsible for the design ...
4 days ago